Line synchronising circuit

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358148, H04N 505

Patent

active

051132575

ABSTRACT:
A line synchronising circuit in a picture display device comprises a phase discriminator, a loop filter and a line oscillator constituting a control loop for controlling the frequency and/or the phase of the oscillator signal. To reduce the phase error, which occurs after a phase jump in the incoming signal, and to reduce the time in which the error is visible, the loop filter has a first part for supplying a first control signal having a first response time and a second part for supplying a second control signal having a second response time which is shorter than the first response time, the two parts of the loop filter being coupled to the control input of the line oscillator, and means for coupling the two parts or the second part, respectively, of the loop filter to the output of the phase discriminator.

REFERENCES:
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Josefsberg, Yekutiel, "Stable and Fast PLL Switches Loop Bandwidths", Electronics, 3/10/82, vol. 55, No. 5, p. 139.

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