Multiplication technique in a data processing system

Details Multiplication technique in a data processing system Multiplication technique in a data processing system

1976-09-30

1978-04-25

Smith, Jerry

Boots, shoes, and leggings

G06F 754

Patent

active

040864740

ABSTRACT:
Two numbers are multiplied together without first changing either of them, if negative, to a positive number, thereby minimizing the time required in the multiplication process. In the multiplication, depending upon the sign of the multiplier and the sign of a bit in a predetermined bit location of the multiplier as shifted in a shift register, the multiplier and the multiplicand are operated on by either a shift operation or operated on by a shift and add operation.

REFERENCES:
patent: 3627999 (1971-12-01), Iverson
patent: 3691359 (1972-09-01), Dell et al.
patent: 3805043 (1974-04-01), Clary
patent: 3816732 (1974-06-01), Jackson

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