Patent
1988-03-10
1989-08-22
Wojciechowicz, Edward J.
357 234, 357 41, 357 43, 357 55, 357 86, H01L 2978
Patent
active
048600725
ABSTRACT:
A monolithic semiconductor device for use in various applications such as lateral and vertical MOS transistors, insulated gate conductivity modulated devices and the like together with a method of manufacturing same. The device includes source, body and drain regions, with the body region including a channel section which is disposed adjacent an insulated gate formed on the surface of the device. The source region includes a central contact area flanked by a pair of body segments which extend up through the source region and which create a resistive path between the source contact area and the channel section. A voltage is developed across the resistive path which tends to maintain a parasitic bipolar transistor formed by the source, body and drain regions in a non-conductive state. A source metallization bridges the two body segments and the intermediate source contact thereby shorting the body region to the source. The geometry of the device is reduced in that width of the source contact area need not be increased to ensure that the source metallization contacts both the source and the body region.
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Ixys Corporation
Wojciechowicz Edward J.
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