Rapidly resettable counting device

Electrical pulse counters – pulse dividers – or shift registers: c – Starting – stopping – presetting or resetting the counter

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377 54, 377 49, H03K 2138

Patent

active

054815827

ABSTRACT:
A rapidly resettable counting device is described, which is particularly suitable for use in signal processors and which comprises a counter (1) receiving a clock signal at an input and supplying its output signal to a first register (2) clocked by the clock signal and to a second register (3) clocked by a reset signal, and a summing stage (4) by means of which the output signal of the second clocked register (3) is subtracted from the output signal of the first clocked register (2), which stage supplies the output signal of the counting device.

REFERENCES:
patent: 4467319 (1984-08-01), Uchikoshi
patent: 5117443 (1992-05-01), Shires
patent: 5222111 (1993-06-01), Muramatsu
patent: 5226063 (1993-07-01), Higashitsutsumi

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