Digital multiplier-accumulator

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G06J 100

Patent

active

053114540

ABSTRACT:
A digital multiplier accumulator for performing the sum of products operation on two or more signal groups is described. The signal groups may be digitally coded and weighted. The multiplier accumulator will multiply selected signals from each signal group. Additionally, the multiplier accumulator can multiply the product of the signals by a scale factor. All of the products can then be summed to provide an analog output which represents the accumulated products of the digital inputs, scaled by the appropriate scale factor. The entire operation may be performed within a single logic element delay, since all the multiplication circuits operate in parallel and the summing is performed simultaneous to the multiplication. The digital multiplication is implemented with standard digital logic, while the analog multiplication and accumulation is implemented with a resistor array.

REFERENCES:
patent: 2966302 (1960-12-01), Woolf et al.
patent: 4159524 (1979-06-01), Schollmeier et al.

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