Semiconductor memory device with a sense amplifier

Static information storage and retrieval – Floating gate – Particular biasing

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365205, 365210, G11C 1140

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active

047991950

ABSTRACT:
A semiconductor memory device comprises memory cell transistors each having a double layered gate having a floating gate and a control gate. The memory device comprises a transistor for receiving a predetermined voltage from a source external to the memory device and providing it as a reference voltage in response to a control signal, and a sense amplifier for comparing a voltage dependent on the data read from the memory cell with the reference voltage.

REFERENCES:
patent: 4028557 (1977-06-01), Wilson
patent: 4301518 (1981-11-01), Klass
Oto et al., "High-Voltage Regulation and Process Considerations for High-Density 5 V-Only E2PROM's", IEEE Journal of Solid-State Circuits, vol. SC-18, No. 5, Oct. 1983.

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