Static information storage and retrieval – Floating gate – Particular biasing
Patent
1995-11-20
1997-07-08
Nelms, David C.
Static information storage and retrieval
Floating gate
Particular biasing
365205, 365207, 327 51, G11C 1134
Patent
active
056468873
ABSTRACT:
Low-voltage-correcting bias circuitry for a sense amplifier includes first, second and third N-channel transistors. The channel of the first transistor couples a current mirror to the input terminal of the amplifier and the gate of the second transistor, the channel of the second transistor couples the gate of the first transistor to a reference terminal. The channel of the third transistor couples the supply voltage to the gate of the first transistor. The gate of the third transistor is coupled to a reference voltage. A P-channel transistor has a channel coupling the supply voltage to the gate of the first transistor. The gate of the P-channel transistor is coupled to a low-voltage-sensing signal. Pre-charge circuitry includes a nonvolatile memory cell and fourth, fifth and sixth N-channel transistors. The channel of the fourth transistor is in series with the channel of the memory cell. The channel of the fifth transistor couples the channel of the memory cell to the input of the sense amplifier. The gates of the fourth and fifth transistors are coupled to a pre-charge operation control signal. The channel of the sixth transistor couples the supply voltage to the channel of the fourth transistor and the gate of the sixth transistor is coupled to the gate of the first transistor.
REFERENCES:
patent: 5297079 (1994-03-01), Ha
Coffman Tim M.
Truong Phat C.
Donaldson Richard L.
Heiting Leo N.
Lindgren Theodore D.
Nelms David C.
Niranjan F.
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