Fishing – trapping – and vermin destroying
Patent
1993-05-27
1994-05-10
Fourson, George
Fishing, trapping, and vermin destroying
437 69, 437 56, 437 34, 437 67, 437924, H01L 21265
Patent
active
053106911
ABSTRACT:
A p.sup.- semiconductor substrate has a surface which is high in a memory cell region and low in a peripheral circuit region. An n.sup.+ buried semiconductor layer of uniform thickness is formed on the substrate. An n.sup.- epitaxial layer formed on the buried semiconductor layer is thin in the memory cell region and thick in the peripheral circuit region, so that the surface of the epitaxial layer can be flat. A concave or convex step is formed on the surface of the epitaxial layer in a boundary portion between the memory cell region and the peripheral circuit region in order to use it as an alignment mark in a later processing step.
REFERENCES:
patent: 4554726 (1985-11-01), Hillenius et al.
patent: 5134082 (1992-07-01), Kirchgessner
patent: 5225365 (1993-07-01), Cosentino
Fourson George
Mason David
Mitsubishi Denki & Kabushiki Kaisha
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