Time-shared, multi-phase memory accessing system having automati

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Details

371 38, G06F 1108, G11C 2900, H03K 1332

Patent

active

043719490

ABSTRACT:
Automatically updatable error logging means incorporated in a multi-phase, bit addressable, variable field memory system. The memory system is partitioned into a plurality of individually addressable memory stacks and employs time-shared accessing of the memory stacks along with time-shared error detection and correction which is used with the error logging means to provide for automatic logging of detected errors during memory accesses on a priority basis.

REFERENCES:
patent: 3209327 (1965-09-01), Brandt
patent: 3735105 (1973-05-01), Maley
patent: 4023146 (1977-05-01), Carroll
patent: 4072924 (1978-02-01), Pomerantz
patent: 4100605 (1978-07-01), Holman
patent: 4107652 (1978-08-01), Tanahashi et al.

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