Low power consumption, high speed CMOS signal input circuit

Details Low power consumption, high speed CMOS signal input circuit Low power consumption, high speed CMOS signal input circuit

1983-09-22

1986-06-10

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307473, 307481, H03K 19003, H03K 19094, H03K 1920

Patent

active

045945195

ABSTRACT:
A signal input circuit particularly well suited for use in MOS integrated circuits. The signal input circuit includes: and input gate circuit for receiving an input signal and an enable control signal, and for generating an output signal equal to the input signal when the enable control signal is in an "enable" state, and for providing a high output impedance when the enable control signal is in a "disable" state; and a holding circuit coupled to an output of the input gate circuit and to receiving the enable control signal, for holding, during the disable state, the output state of the input gate circuit immediately before the enable control signal changes to a disable state, the output impedance being high when the enable control signal is in an enable state.

REFERENCES:
patent: 3745731 (1973-07-01), Suzuki
patent: 3766408 (1973-10-01), Suzuki et al.
patent: 3989955 (1976-11-01), Suzuki
patent: 4329600 (1982-05-01), Stewart
patent: 4350906 (1982-09-01), Gillberg
patent: 4435658 (1984-03-01), Murray et al.
patent: 4449064 (1984-05-01), Eckert et al.
patent: 4465945 (1984-08-01), Yin

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