Block signal forming digital processor with error correction

Details Block signal forming digital processor with error correction Block signal forming digital processor with error correction

1981-05-22

1983-02-01

Malzahn, David H.

Excavating

G06F 1110

Patent

active

043712703

ABSTRACT:
A digital signal processing circuit in which a first correction signal generation circuit forms a first signal P for correction by a modulus 2 addition of m (a given integer) generation elements. These are picked out as a unit, without including same generation element each other, from a group S composed of a plurality of generation elements. Each of the latter is a digital signal of one sampling period among digital signals obtained by digital processing (pulse code modulation) an information signal with a specific sampling. A second correction signal generation circuit forms a second signal Q for correction by a modulus 2 addition of n (a given integer) generation elements which are picked out as a unit from the group S in such a manner that the generation elements thus picked out do not include the same generation element each other. The number of common essential elements of generation element of said first correction signal P is considered to be one (unity) or less. A block signal forming device picks out output L/m first correction signals P and L
second correction signals Q (where L being common multiple of m and n) respectively out of groups of the first and second correction signals P and Q. These groups are formed by using once all of the generation elements of the group S led out of the first and second correction signal generation circuits and moreover for picking out L generation elements out of the group S.

REFERENCES:
patent: 3697948 (1972-10-01), Bossen
patent: 3836957 (1974-09-01), Duke et al.
patent: 3913068 (1975-10-01), Patel

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