Patent
1997-03-19
1998-12-01
Shin, Christopher B.
395885, 395580, 39520064, 3952028, G06F 1300
Patent
active
058451528
ABSTRACT:
A method for the loading and unloading of a FIFO in an isochronous transmission mechanism uses descriptor blocks which have both branch addresses and skip addresses. The method can recover from cycle loss by selectively resending or skipping a packet that should have been sent in the lost cycle. The method also works two cycles ahead of schedule, in an attempt to keep the FIFO loaded with all of the packets for two cycles of transmission. The FIFO is filled according to a DMA algorithm and drained according to a Link algorithm where the two algorithms are coordinated to communicate information about lost cycles and current demands or opportunities for transmission. If the Link algorithm detects a lost cycle, it communicates that to the DMA algorithm and the DMA algorithm seeks to compensate appropriately. These two algorithms describe mechanisms for the DMA and Link sides of an isochronous transmitter. Working in parallel, these two units can transmit isochronous packets on a serial bus, with two-cycle workahead, while supporting various recovery mechanisms for dealing with cycle loss. Each of the isochronous channels being transmitted by this system can use the recovery mechanisms, chosen as appropriate to best satisfy application-specific requirements.
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Anderson Eric Werner
Eneboe Michael K.
Puri Rahoul
Staats Erik P.
Aaker Mark A.
Apple Computer Inc.
Shin Christopher B.
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