Neuron unit, neural network and signal processing method

Details Neuron unit, neural network and signal processing method Neuron unit, neural network and signal processing method

1993-09-30

1997-04-08

MacDonald, Allen R.

395 24, 395 27, G06E 100, G06E 300, G06F 1518

Patent

active

056196172

ABSTRACT:
A neuron unit processes a plurality of input signals and outputs an output signal which is indicative of a result of the processing. The neuron unit includes input lines for receiving the input signals, a forward process part including a supplying part for supplying weight functions and an operation part for carrying out an operation on each of the input signals using one of the weight functions and for outputting the output signal, and a self-learning part including a generating part for generating new weight functions based on errors between the output signal of the forward process part and teaching signals and a varying part for varying the weight functions supplied by the supplying part of the forward process part to the new weight functions generated by the generating part.

REFERENCES:
patent: 3293609 (1966-12-01), Martin
patent: 3601811 (1971-08-01), Yoshino
patent: 4193115 (1980-03-01), Albus
patent: 4807168 (1989-02-01), Moopenn et al.
patent: 4874963 (1989-10-01), Alspector
patent: 4893255 (1990-01-01), Tomlinson, Jr.
patent: 4918618 (1990-04-01), Tomlinson, Jr.
patent: 4941122 (1990-07-01), Weideman
patent: 4972363 (1990-11-01), Nguyen et al.
patent: 4974169 (1990-11-01), Engel
patent: 4990838 (1991-02-01), Kawato et al.
patent: 5043913 (1991-08-01), Furutani
patent: 5046020 (1991-09-01), Filkin
patent: 5048100 (1991-09-01), Kuperstein
patent: 5093899 (1992-03-01), Hiraiwa
patent: 5095443 (1992-03-01), Watanabe
patent: 5129038 (1992-07-01), Kohda et al.
patent: 5157275 (1992-10-01), Stork et al.
patent: 5167006 (1992-11-01), Furuta et al.
Parallel, Self-Organizing, Hieroarchical Neural Networks Ersoy et al IEEE Jun. 1990.
An Analog CMOS Backward Error-Propagation LSI; Furman et al.; First Annual INNS Symposium; Sep. 1988.
The VLSI Implementation of Stonn; Wilke et al.; IJCNN 1990; vol. 2; pp. 593-598.
Asynchronous VLSI Neural Networks Using Pulse-Stream Arithmetic; Murray et al.; IEEE Journal of Solid-State Circuits; vol. 23, No. 3; Jun. 1988; pp. 688-697.
A Study of Regular Architectures for Digital Implementations of Neural Networks; Suzuki et al.; IEEE Inter. Sumposium on Circuits and Systems; 8-11 May 1989; pp. 82-85.
VLSI Architectures for Neural Networks; Treleaven et al.; IEEE Micro; Dec. 1989; pp. 8-27.
Digital Neural Networks; Martinez; Proc. of the 1988 IEEE Inter. Conf. on Systems, Man & Cybernetics; Aug. 8-12, 1988; pp. 681-684.
Layered Neural Nets for Pattern Recognition; Widrow et al.; IEEE Trans. on Acoustics, Speech and Signal Processing; vol. 36, No. 7; Jul. 1988; pp. 1109-1118.
A Wafer Scale Integration Neural Network Utilizing Completely Digital Circuits; Yasunaga et al.; Proc. of the IJCNN; Jun. 18, 1989; vol. 2; pp. 213-217.
Yuzo Hirai et al, "Design of a Completely Digital Neuro-Chip," Integrated Circuit Study Group of the Electronic Information Communication Society, Dec. 16, 1988, pp. 89-93.
W. Banzhaf, "On a Simple Stochastic Neuron-Like Unit," Biol. Cybern., 1988, pp. 155-160.
A General Purpose Digital Architecture for Neural Network Simulations; Duranton et al.; First IEEE Inter. Conf. on Artificial Neural Networks; 16-18 Oct. 1989; pp. 62-66.
Design of Parallel Hardware Neural Network Systems from Custom VSLI `Building Block` Chips; Eberhardt et al.; IJCNN; Jun. 18-22, 1989; vol. 2; pp. 183-190.
Kamada et al., "Digital Neuron Model", 1988 Electronic Information Communication Society Spring National Conference.
Yoshida et al., "Neural Coupling Model of Visuel Domain", 1974 Electronic Communication Society National Conference.
K. Fukushima, "Cognitron", 1974 Electronic Communication Society National Conference.
K. Fukushima, "Improvement in Pattern-Selectivity of a Cognitron", Electronic Communication Society Papers '79/10 vol. J62-A No. 10.
W. Banzhaf, "On a Simple Stochastic Neuron-Like Unit", Biological Cybernetics vol. 60, No. 2, 1988.
Ito et al., "A Neural Network Model Extracting Features form Speech Signals", Electronic Information Communication Society Papers '87/2 vol. J70-D No. 2.
Murray et al., "Asynchoronous Arithmetic for VLSI Neural Systems", Electronics Letters 4th Jun. 1987, vol. 23, No. 12.
Murray et al., "A Novel Computational and Signalling Method for VLSI Neural Networks", Digest of Technical Papers ESSCIRC '87 Thirteenth European Solid-State Circuits Conference, Sep. 23-25, 1987.

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