Read/modify/write circuit for computer memory operation

Details Read/modify/write circuit for computer memory operation Read/modify/write circuit for computer memory operation

1984-06-20

1987-05-05

Williams, Archie E.

Boots, shoes, and leggings

G06F 1206

Patent

active

046637281

ABSTRACT:
A read/modify/write circuit (10) for a computer is used in conjunction with a main memory (12) in which block operations are executed using a plurality of data units. The circuit (10) includes a first register connected to receive a data block from the main memory (12), a second register connected to receive data units from a requestor, such as a processor (18) and a third register in which a resulting data block is produced which comprises the data units to be written into the main memory (12) and the remaining data units which were previously in the block read from memory (12). Multiplex circuits (70, 72, 74, 76, 78, 80, 82 and 84) are commanded by a decoder (136) in response to the processor (18) to selectively route sections of registers (26 and 28) into a register (106). The resulting data block is then transferred through the memory bus (14) for writing into the main memory (12). The outputs of the multiplexors (70-84) can be driven by the decoder (136) to a predetermined logic state so that a selected data block can be written into the main memory (12) for test and evaluation purposes.

REFERENCES:
patent: 4225959 (1980-09-01), Suelflow et al.
patent: 4467419 (1984-08-01), Wakai
Computer Organization and Micrprogramming Charpt 7, 1972, Prentice-Hall, Inc., Englewood Cliffs, New Jersey.
Chu, Y., Computer Organization and Micro-programming, Chap. 7, 1972, Prentice-Hall, Inc., Englewood Cliffs, New Jersey.

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