Memory mapping unit for decoding address signals

Details Memory mapping unit for decoding address signals Memory mapping unit for decoding address signals

1987-02-18

1988-09-27

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 1200

Patent

active

047746521

ABSTRACT:
A memory mapping unit which permits a computer to run programs designed to provide 32-bit or 24-bit address signals to address a 32-bit addressable memory. When a CPU generates a 32-bit address, that address is passed through to provide a 32-bit physical address. However, when the CPU generates a 24-bit address, the most significant bits are processed by the memory mapping unit to provide a remapped 32-bit physical address. The memory mapping unit is implemented on a single semiconductor chip using gate-array technology.

REFERENCES:
patent: 4484263 (1984-11-01), Olson et al.
"MC68851 Page Memory Management Unit User's Manual"; Motorola; Prentice-Hall; 1986.

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