III-V semiconductor gate structure and method of manufacture

Details III-V semiconductor gate structure and method of manufacture III-V semiconductor gate structure and method of manufacture

1996-01-16

1997-04-08

Jackson, Jerome

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

257640, 257649, 257280, H01L 2358

Patent

active

056190646

ABSTRACT:
A manufacturable III-V semiconductor gate structure having small geometries is fabricated. A silicon nitride layer is formed on a III-V semiconductor material and a dielectric layer comprised of aluminum is formed on the silicon nitride layer. Another dielectric layer comprised of silicon and oxygen is formed over the dielectric layer comprised of aluminum. The dielectric layer comprised of aluminum acts as an etch stop for the etching of the dielectric layer comprised of silicon and oxygen with a high power reactive ion etch. The dielectric layer comprised of aluminum may then be etched with a wet etchant which does not substantially etch the silicon nitride layer. Damage to the surface of the semiconductor material by exposure to the high power reactive ion etch is prevented by forming the dielectric layer comprised of aluminum between the silicon nitride layer and the dielectric layer comprised of silicon and oxygen.

REFERENCES:
patent: 4599790 (1986-07-01), Kim et al.
patent: 4757033 (1988-07-01), Ebata

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