Method for avoiding shorts in the manufacture of layered electri

Fishing – trapping – and vermin destroying

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437229, 437923, 437939, 437 2, 136258, 136290, 430313, H01L 3118

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active

047741937

ABSTRACT:
A method for avoiding shorts between two separated layer electrodes in a layered electrical component, such as a solar cell having amorphous silicon layers, includes the steps of generating a first electrode layer on a substrate, generating an intermediate non-electrode layer, which may possibly have voids therein, over the first electrode, and generating a photo-resist layer on the intermediate layer which fills any voids which may exist in the intermediate layer. The substrate and the first electrode layer are transmissive for selected radiation, and the intermediate layer is non-transmissive for the selected radiation. The photo-resist is exposed in the voids by irradiation with the selected radiation through the substrate and the first electrode layer, so that the exposed photo-resist in the voids has a different solubility than the unexposed remainder of the photo-resist. If the photo-resist is of the type such that irradiation polymerizes the exposed photo-resist, a polymerized plug will be present in any voids which may exist in the intermediate layer, so that when a second electrode layer is subsequently applied over the intermediate layer, no shorts will result through the voids. If the photo-resist is of the opposite type, the soluble photo-resist is removed from the voids, leaving a mask of polymerized photo-resist over the intermediate layer, and the voids are filled using the mask with an insulating material. The photo-resist mask is then removed and the second electrode layer is generated over the intermediate layer, with the insulating plugs again preventing the formation of shorts through the voids.

REFERENCES:
patent: 4725558 (1988-02-01), Yamazaki et al.
"Amorphous and Polycrystalline Semiconductors", Hewang, vol. 18 in the series Semiconductor Electronics (1984), pp. 58-64.

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