Method of fabricating large area semiconductor arrays

Details Method of fabricating large area semiconductor arrays Method of fabricating large area semiconductor arrays

1988-04-25

1989-04-18

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 51, 437226, 437228, 156643, 156647, 156646, H01L 2100, H01L 2102, H01L 2172, H01L 2198

Patent

active

048227552

ABSTRACT:
A method for separating chips formed on a silicon substrate is provided which uses a combination of reactive ion etching techniques combined with orientation etching to yield integrated chips having edges which can be more precisely butted together to form large area arrays.

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Jackson, T. N., An Electrochemical P-N Junction Etch-Stop for The Formation of Silicon Microstructures, 2/81, IEEE Electron Device Lett., vol. EDL-2, No. 2, pp. 44-45.

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