Asynchronously programmable frequency divider circuit with a sym

Details Asynchronously programmable frequency divider circuit with a sym Asynchronously programmable frequency divider circuit with a sym

1998-06-19

1999-12-28

Wambach, Margaret R.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

327115, 327147, 327156, H03K 2100

Patent

active

060091398

ABSTRACT:
A programmable divider circuit having an adjustable shift register is coupled to a clock and to an output. The shift register receives a clock signal having a clock signal frequency and outputs an output signal with an output frequency corresponding to a user selected divide ratio of the clock signal frequency. Control inputs are coupled to the adjustable shift register to receive control data for adjusting a length of the shift register, the length of the shift register corresponding to the user selected divide ratio.

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patent: 5337339 (1994-08-01), Hillstrom
patent: 5359635 (1994-10-01), Atriss et al.
patent: 5835551 (1998-11-01), Kawarazaki

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