Polysilicon undercut process for stack DRAM

Details Polysilicon undercut process for stack DRAM Polysilicon undercut process for stack DRAM

1992-12-21

1994-12-20

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 60, 437919, H01L 2170, H01L 2700

Patent

active

053745779

ABSTRACT:
A method for fabricating DRAM capacitors is described. Field effect devices are foraged in the silicon substrate. A first oxide layer is formed over the device and field oxide areas. The capacitors are formed by first depositing a heavily doped silicon layer over the device and field oxide areas. Then forming openings to the desired source/drain structures by etching through the silicon layer, and first oxide layers, wherein the opening extends over a portion of the gate electrode polysilicon layer of the gate structure and the field oxide areas. An undoped polysilicon layer is deposited over the openings to the source/drain structures. Patterning anisotropically the silicon and molysilicon layers so as to have their remaining portions over the planned capacitor areas, and wherein a portion of the heavily doped silicon layer remains over both the portion of the polysilicon gate electrode of the gate structure and the field oxide areas. Then completely removing by selective etching the portion of heavily doped silicon layer using phosphoric acid at a temperature greater than 140.degree. C. to create an undercut of the undoped polysilicon layer over both the portion of the polysilicon gate electrode of the gate structure and the field oxide areas and to construct the bottom storage node electrode of the desired capacitor. The capacitor is then completed.

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