Method and system for decoding coded video signals

Television – Bandwidth reduction system – Data rate reduction

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348402, H04N 712, H04N 1102, H04N 1104

Patent

active

060088494

ABSTRACT:
Presently most MPEG video decoders use 16 Mbit of external memory. This memory capacity is almost completely occupied by the video decoding process in case of 625 line/50 Hz systems. Also the communication speed to the external memory is rather high. In future decoders, additional functions will be added to the video decoder, a need for free memory space and communication bandwidth will come up soon. Memory bandwidth becomes available with the application of synchronous dynamic random access memories (SDRAM) although high memory bandwidths lead to high operating frequencies. In order to release some memory capacity, a modification in the video decoding process is proposed by which 1 up to 3 Mbit of memory capacity can be saved. This modification has no big impact on the memory communication bandwidth. In order to keep the speed requirements in the variable length decoding within practical limits, a 2 step video decoding approach is proposed. On basis of this approach, several alternatives are possible, each with a different trade-off between extra processing requirements and memory saving.

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patent: 5504530 (1996-04-01), Obikane et al.
patent: 5504823 (1996-04-01), Yoon
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patent: 5576765 (1996-11-01), Cheney et al.
ISCAS 94, London, May 1994, Chapter 3.22, "VLSI Inplementation of MPEG Decoders".

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