Fishing – trapping – and vermin destroying
Patent
1993-10-22
1994-12-20
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 45, 437150, H01L 21266
Patent
active
053745655
ABSTRACT:
A method of forming an ESD protection device with reduced junction breakdown voltage, simultaneously with an integrated circuit which includes FET devices, and the resultant device structure, are described. A silicon substrate is provided on which there are field oxide regions, gates, and active regions. A first ion implant of a conductivity-imparting dopant is performed in a vertical direction into the active regions of the ESD protection device and the FET devices. A first insulating layer is formed over the ESD protection device and the FET devices, and over the field oxide regions. The first insulating layer is patterned to create spacers adjacent to the gates of both the ESD protection device and the FET devices. A second ion implant of a conductivity-imparting dopant with higher concentration than dopant from the first ion implant is performed into active regions of both the ESD protection device and the FET devices. A second insulating layer is formed over the ESD protection device and the FET devices, and over the field oxide regions. The second insulating layer is patterned to form contact openings to the active regions. Finally, a third ion implant of a conductivity-imparting dopant, with opposite conductivity from the first and second ion implants, having equal concentration to dopant from the first ion implant, is performed through the contact openings into active regions of the ESD protection device.
REFERENCES:
patent: 4649629 (1987-03-01), Miller et al.
patent: 4968639 (1990-11-01), Bergonzoni
patent: 5077590 (1991-12-01), Fujihira
patent: 5142345 (1992-08-01), Miyata
patent: 5234853 (1993-08-01), Ikemasu
patent: 5272097 (1993-12-01), Shiota
Hsue Chen-Chiu
Ko Joe
Ackerman Stephen B.
Chaudhari Chandra
Hearn Brian E.
Saile George O.
United Microelectronics Corporation
LandOfFree
Method for ESD protection improvement does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for ESD protection improvement, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for ESD protection improvement will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2385837