Semi-automatic program execution error detection

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364DIG1, 3642653, 3642656, 364266, 371571, 371 60, G06E 1128

Patent

active

054044995

ABSTRACT:
A system for generating an early indication of a fault in the operation of a computer program is described. In one embodiment, each location in a computer's memory space is assigned a code indicating the conditions under which the programmer expects the memory location to be accessed during the program's execution. When a memory location is accessed, the control/status signals generated by the CPU are compared to the assigned code. If the type of access, as indicated by the control/status signal, does not conform to the expected type of access, as indicated by the assigned code, an output is generated to indicate that a fault has occurred in the operation of the program. In another embodiment, a truncated numerical difference between the present memory address and the immediately previous memory address is generated. This difference is used along with the assigned code and the control/status signal to determine whether access to the present memory address is unexpected. Once again, if the access is unexpected, an output is generated to so indicate. The system allows the detection of a fault in program operation before an incorrect output is generated. The system is useful in applications such as fault detection during the development of a computer program or computer based controller, or monitoring the operation of a critical computer based controller.

REFERENCES:
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patent: 4890223 (1989-12-01), Cruess et al.
Lazzerini et al., "A Programmable Debugging Aid for Real-Time Software Development", IEEE Micro, Jun. 1986, pp. 34-42.
Feustel, E., "On the Advantages of Tagged Architecture", IEEE Trans. on Computers, vol. C-22, No. 7, Jul. 1973, pp. 644-656.
Johnson, M., "Some Requirements for Architectural Support of Software Debugging", Proc. Symp. on Architectural Support for Programming Languages and Operating Systems, Mar. 1-3, 1982, Palo Alto, Calif., pp. 140-148.
Grappel, R., "Extend MP capabilities with a memory-management IC", EDN, Feb. 3, 1983, pp. 123-130.

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