Patent
1991-10-31
1995-04-04
Powell, Mark R.
395163, 395166, 395325, G06F 1520
Patent
active
054044456
ABSTRACT:
An interface for a high-performance graphics adapter is provided in a computer system which includes a host processor, a coprocessor in the form of a graphics system processor, and memory addressable by both host and co-processors. An application computer program running on the host processor utilizes a graphics operating system, such as a Video Graphics Array Basic Input/Output System (VGA BIOS) to write graphics data in VGA format to the memory. A tactical address controller translates memory addresses generated by the VGA BIOS (and hence the host processor) into memory addresses recognized by the coprocessor. One or more graphics controllers store the graphics data, expanded into VGA format, into a VGA video random-access memory (RAM) buffer. A Format Translator, under the direction of the graphics system processor, then translates the VGA graphics data in the video RAM buffer into a packed pixel form, and the graphics data is displayed on a cathode ray tube (CRT).
REFERENCES:
patent: 4905167 (1990-02-01), Yamaoka et al.
patent: 4958378 (1990-09-01), Bell
Inmos, "XGA Software Programmer's Guide", 1st ed. 1991, 72 OZK 25800 (Sep. 1991).
Texas Instruments, "TMS 34020, TMS 34020A, Graphics System Processors", SPVS004B (Mar. 1990--Revised Oct. 1990).
Texas Instruments, "TMS 34020 User's Guide", 2564006--9721 revision (Aug. 1990).
Ross, "First Looks: $995 TIGA 34020 Graphis Adapter", PC Magazine, Jan. 29, 1991, at 48.
Poor, "1,024-by-768 Coprocessed Graphics Adapters: High Resolution and High Speed", PC Magazine, Jun. 25, 1991, at 103-157.
English Abstract of Japanese Publication No. JP3129477, published Jun. 3, 1991.
English Abstract of Japanese Publication No. JP60129868, published Jul. 11, 1985.
Powell Mark R.
Toshiba America Information Systems Inc.
Tung Kee M.
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