ESD Input protection using a floating gate neuron MOSFET as a tu

Details ESD Input protection using a floating gate neuron MOSFET as a tu ESD Input protection using a floating gate neuron MOSFET as a tu

1996-09-12

1999-12-28

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Regenerative type switching device

With means to control triggering

257173, 257174, 257355, 257360, 361 20, 361 90, 361 91, 361118, 361126, 361272, H01L 2906

Patent

active

060085088

ABSTRACT:
Disclosed is a floating gate neuron MOS transistor that may be incorporated into devices such as low voltage silicon control rectifiers for protection of internal circuits against electrostatic discharge. The transistor includes two or more input gates capacitively coupled to the floating gate. By adjusting the coupling ratio of the input gates, it is possible to control the transistor drain turn-on voltage very precisely and thereby turn on the rectifier without relying on avalanche breakdown of the transistor.

REFERENCES:
patent: 5272586 (1993-12-01), Yen
A. Chatterjee et al., "A Low-Voltage Triggering SCR for On-Chip ESD Protection at Output and Input Pads", IEEE Electron Device Letters, vol. 12, No. 1, Jan. 1991, pp. 21-22.
Shibata et al., "A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations", IEEE Transactions on Electron Devices, vol. 39, No. 6, Jun. 1992, pp. 1444-1455.
M.D. Ker et al., "Complementary-LVTSCR ESD Protection Circuit for Submicron CMOS VLSI/ULSI", IEEE Transactions on Electron Devices, vol. 43, No. 4, Apr. 1996, pp. 588-598.

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