Method of fabricating semiconductor integrated circuit devices i

Details Method of fabricating semiconductor integrated circuit devices i Method of fabricating semiconductor integrated circuit devices i

1989-04-03

1991-05-21

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 41, 437 52, 437193, 437 60, 437918, 437934, H01L 21225

Patent

active

050175076

ABSTRACT:
A method of fabricating semiconductor integrated circuit devices in which a wiring is connected, via a silicon film, to a semiconductor region which is the source region or the drain region of a MISFET. The method comprises a step for introducing impurities for forming a semiconductor region of the MISFET to shallowly form the semiconductor region, a step for forming a silicon film on the main surface of the semiconductor substrate in the region where the impurities are introduced, and a step for diffusing impurities into the semiconductor substrate and for diffusing impurities into a silicon film by the heat treatment so that the silicon film is permitted to possess electric conductivity.

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patent: 4648175 (1987-03-01), Metz, Jr. et al.
patent: 4701423 (1987-10-01), Szluk
patent: 4742018 (1988-03-01), Kimura et al.
patent: 4774203 (1988-09-01), Ikeda et al.
patent: 4855248 (1989-08-01), Aziizumi et al.

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