Time-domain boundary buffer method and apparatus

Details Time-domain boundary buffer method and apparatus Time-domain boundary buffer method and apparatus

1992-09-16

1994-10-18

Shaw, Dale M.

395275, G06F 1314

Patent

active

053576136

ABSTRACT:
A method and apparatus for a circuit physically realizing a time domain boundary buffer circuit for capturing data signals transmitted on an asynchronous domain bus and transmitting the data signals to a synchronous domain is described. The circuit comprises a data ready circuit and a data buffer circuit. The data ready circuit comprises a first flip flop is coupled to an asynchronous input, a second flip-flop is coupled to the synchronous domain clock and the output of the first flip flop, and a third flip-flop is coupled to the synchronous domain clock and the output of the second flip-flop, the circuit having an output coupled to a circuit output terminal; the third flip flop for providing a synchronous output which reflects an event occurrence on the asynchronous input. Other embodiments are also described.

REFERENCES:
patent: 4974241 (1990-11-01), McClure et al.
patent: 4984194 (1991-01-01), Hogberg
patent: 5128970 (1992-07-01), Murphy

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