Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1982-03-09

1985-07-30

Fears, Terrell W.

Static information storage and retrieval

Addressing

365189, G11C 1140

Patent

active

045326134

ABSTRACT:
In a semiconductor memory device including an output buffer circuit receiving data signals read out from a memory cell array, an output stage MOS transistor being turned ON and OFF according to the output signals of the output buffer circuit, and an output buffer enable (OBE) signal generator circuit for generating an OBE signal which is used as the voltage supply to the output stage of the output buffer circuit, a V.sub.BS voltage generator circuit is provided for generating a voltage V.sub.BS higher than the voltage source V.sub.CC preceding the rising up of the OBE signal, which voltage V.sub.BS is used as a voltage supply to the output stage of the OBE signal generator circuit, whereby the OBE signal is formed as a voltage waveform which rises rapidly up to a level higher than the voltage source V.sub.CC.

REFERENCES:
patent: 4176289 (1979-11-01), Leach et al.

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