Patent
1988-02-29
1991-02-12
Larkins, William D.
357 2312, H01L 2978
Patent
active
049928384
ABSTRACT:
A method and structure for adjustment of the threshold voltage of a vertical metal-oxide-semiconductor transistor. Chemical vapor deposition of doped silicon dioxide and annealing are used to form a voltage-threshold-adjustment region in at least the channel layer of the transistor adjacent to the trench wall.
REFERENCES:
patent: 3823352 (1974-07-01), Pruniaux et al.
patent: 3867204 (1975-02-01), Ruttedge
patent: 4052229 (1977-10-01), Pashley
patent: 4163988 (1979-08-01), Yeh et al.
Demond Thomas W.
Larkins William D.
Neerings Ronald O.
Sharp Melvin
Texas Instruments Incorporated
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