Level converter circuit for converting ECL-level input signals

Details Level converter circuit for converting ECL-level input signals Level converter circuit for converting ECL-level input signals

1992-10-14

1994-10-18

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, H03K 1901

Patent

active

053571541

ABSTRACT:
A level converter circuit, in which a bipolar transistor for raising an output voltage is switched on or off by a logical-BiMIS construction, and a MIS transistor for falling the output voltage is also switched on or off by a logic circuit and a charge discharge means 50 so as to reduce a propagation delay time, to raise a driving ability, to prevent a steady state current and to reduce a dissipation current.

REFERENCES:
patent: 4730132 (1988-03-01), Watanabe et al.
patent: 5059821 (1991-10-01), Murabayashi et al.
patent: 5068548 (1991-11-01), El Gamel
patent: 5138199 (1992-08-01), Hirata et al.
patent: 5159214 (1992-10-01), Okumura
patent: 5254887 (1993-10-01), Oguri

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