Semiconductor device capable of laminating a plurality of wiring

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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Details

257775, 257758, H01L 2348, H01L 2940

Patent

active

053571401

ABSTRACT:
In a semiconductor device comprising a plurality of wiring layers which are laminated on a silicon substrate, at least one of the plurality of wiring layers comprises an insulator layer, circuit patterns formed on the insulator layer, and a plurality of rectangular dummy patterns formed on a vacant area of the insulator layer. The plurality of rectangular dummy patterns are arranged so that two adjacent ones of the plurality of rectangular dummy patterns are arranged zigzag along a one direction and that extended lines of a pair of short sides of each of the plurality of rectangular dummy patterns orthogonally cross a pair of long sides of an adjacent one that is adjacent to the each of the plurality of rectangular dummy patterns.

REFERENCES:
patent: 4484212 (1984-11-01), Komatsu et al.

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