Method of making electrode wiring regions and impurity doped reg

Details Method of making electrode wiring regions and impurity doped reg Method of making electrode wiring regions and impurity doped reg

1979-04-23

1981-12-22

Roy, Upendra

Metal treatment

Compositions

Heat treating

29571, 29591, 148187, 357 23, 357 59, 357 91, H01L 21263, H01L 2126, B01J 1700

Patent

active

043069150

ABSTRACT:
A semiconductor device suitable for a high-density integrated circuit is disclosed. The semiconductor device comprises an electrode wiring layer made of silicon with a substantially flat surface deposited on a major surface of a semiconductor substrate, the periphery of which is filled with an insulating layer produced by selectively oxidizing the silicon, a first impurity doped region formed in the semiconductor substrate in self-aligning relation with the electrode wiring layer, and a second impurity doped region coupled to the first impurity doped region and underlain the insulating layer.

REFERENCES:
patent: 4069067 (1978-01-01), Ichinohe
patent: 4127931 (1978-12-01), Shiba
patent: 4160683 (1979-07-01), Roche
patent: 4179311 (1979-12-01), Athanas

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