Boots – shoes – and leggings
Patent
1994-11-02
1997-10-07
Ray, Gopal C.
Boots, shoes, and leggings
364707, 3642731, 3642732, 3642328, 364DIG1, G06F 132
Patent
active
056758081
ABSTRACT:
A power control and memory refresh rate management circuit is described. The power control circuit provides circuitry for selectively disabling or enabling modular logic circuit blocks within a VLSI integrated circuit under program control from an external processor, or for suspended circuit operation in general. In low-power modes external memory refresh signal generation circuits are provided with a low-frequency oscillator signal to conserve power.
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Gulick Dele E.
Hewitt Larry D.
Hogan Michael
Norris David
Advanced Micro Devices , Inc.
Ray Gopal C.
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