Memory controller having means for comparing a designated addres

Details Memory controller having means for comparing a designated addres Memory controller having means for comparing a designated addres

1995-06-07

1997-10-07

Kim, Matthew M.

395481, 39542103, G06F 1202

Patent

active

056757700

ABSTRACT:
It is desired to utilize two (or more) non-contiguous areas in memory as though they formed a single continuous area. An end address of a first memory area and a start address of a second memory area are set in a setting means. When the address in an address counter reaches the end address of the first of the two (or more) memory areas, the address counter is controlled to jump directly to the start address of the second area. By virtue of this structure, it become possible to access the first and second areas successively, as one continuous area, even though the two areas are separated from each other in the memory space.

REFERENCES:
patent: 4000378 (1976-12-01), Caplan
patent: 4004278 (1977-01-01), Nagashima
patent: 4024510 (1977-05-01), Pearson
patent: 4562532 (1985-12-01), Nishizawa et al.
patent: 4803654 (1989-02-01), Rasberry et al.

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