Picture processing apparatus

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Details

364518, 340721, 340723, 340747, 382 48, 382 56, G06F 1566

Patent

active

048520241

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

1. Field of the Invention
This invention relates to a picture processing apparatus for processing picture data received from a sensor such as a video camera and displaying the processed data on a display unit. More particularly, the invention relates to a picture processing apparatus so adapted that picture processing can be limited by a window pattern generated by a graphic display processing controller.
2. Description of the Related Art
In a conventional picture processing apparatus, picture data from sensor of e.g. an industrial robot are stored in buffer memory such as a frame memory having a storage area corresponding to the display frame of the display unit, and discrimination of the position of an object contained in the picture data and recognition of the shape of the object are realized by executing predetermined picture processing with regard to all information in the frame memory.
With a conventional picture processing apparatus of this type, there are cases where the desired results can be obtained without performing processing with regard to all picture data in the frame memory. However, even if processing is executed by a dedicated picture processor for picture data stored in a frame memory, picture processing based on all information in the designated frame memory is unavoidable, thereby prolonging processing time. Accordingly, a system has been conceived in which window pattern information is outputted at the same time that the frame memory is designated by a main processor, a bit pattern designating an area necessary for feature recognition of a picture stored in the frame memory is formed in another frame memory in advance, and the area of picture processing is limited by the bit pattern. With this method, however, window data are generated and stored by the main processor, which therefore must be given a large memory capacity. In addition, processing time is prolonged, making it impossible to perform picture processing efficiently.


SUMMARY OF THE INVENTION

An object of the present invention is to provide a picture processing apparatus in which the memory capacity of the main processor can be reduced and picture processing time shortened so that highly efficient picture processing can be realized.
According to the present invention, there is provided a picture processing apparatus including a processor for performing picture processing, a frame memory for storing a picture to be processed by the processor, a window memory having a size corresponding to the frame memory for storing a bit pattern for designating the validity or invalidity of processing performed by the processor, a graphic display processing controller for generating a bit pattern with respect to the window memory, and a main processor for providing the graphic display processing controller with predetermined command data for bit pattern generation.
In the picture processing apparatus of the invention constructed as set forth above, the graphic processing controller generates a bit pattern with respect to the window memory, forms a bit pattern in accordance with what in the frame memory is to be processed, and performs picture processing solely with regard to picture data in the area of the frame memory specified by the bit pattern. As a result, the memory capacity of the main processor can be reduced and highly efficient picture processing can be carried out.


BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram illustrating a picture processing apparatus according to the present invention;
FIG. 2 is a block diagram of a CRT controller used in the apparatus illustrated in FIG. 1; and
FIG. 3 is a block diagram illustrating the construction of a graphic processor.


DESCRIPTION OF THE PREFERRED EMBODIMENT

An embodiment of the invention will now be described with reference to the drawings.
FIG. 1 is a block diagram of a picture processing apparatus according to the invention, and FIG. 2 is a schematic view for describing an example of the internal construction of a CRT controller.
In

REFERENCES:
patent: 4400728 (1983-08-01), Long
patent: 4450579 (1984-05-01), Nakashima et al.
patent: 4479145 (1984-10-01), Azuma et al.
patent: 4589139 (1986-05-01), Hada et al.
patent: 4651341 (1987-03-01), Nakashima et al.
patent: 4700224 (1987-10-01), Miyasaka et al.
patent: 4707647 (1987-11-01), Coldren et al.
Partial English Translation of Japanese Patent Publication No. 60-019191.

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