Fast CMOS NAND gate circuit

Details Fast CMOS NAND gate circuit Fast CMOS NAND gate circuit

1988-03-10

1989-07-25

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307448, 307451, H03K 1716, H03K 19017, H03K 19094

Patent

active

048517135

ABSTRACT:
An n-input CMOS NAND-gate having n pMOS transistors connected in parallel with their inputs connected to different input terminals and their outputs connected to a common output terminal. First and second sets of n nMOS transistors are each connected in series between the output terminal and ground. The inputs of the first set of nMOS transistors are connected to the input terminals in order, and the inputs of the second set of nMOS transistors are connected to the input terminals in the reverse order.

REFERENCES:
patent: 4736117 (1988-04-01), Wieser
"High-Speed Compact Circuits with CMOS" IEEE Journal of Solid State Circuits, vol. SC-17, No. 3, Jun. 1982, Krambeck et al.

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