Fishing – trapping – and vermin destroying
Patent
1988-08-24
1989-07-25
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 33, 437162, 437917, 357 59, 357 34, 357 49, H01L 2972
Patent
active
048513628
ABSTRACT:
A method for manufacturing a semicondcutor device includes, steps of forming a poly silicon layer at a predetermined area for a base electrode on a surface of a thin insulating film, forming an insulating film at a sidewall of the exposed poly silicon layer, growing first and second selective epitaxial layers on the exposed surface of a silicon substrate to connect the epitaxial layer with the poly silicon layer and forming an active base and an emitter in the epitaxial layer so that the poly silicon layer is constituted as a pull-out electrode for the base.
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T. Sasaki et al., "Gigabit Logic Bipolar Technology: Advanced Super Self-Aligned Process Technology", Electronics Letters, Apr. 14, 1983, vol. 8, pp. 283-284.
Ohuchi et al., "A New Self-Aligned Transistor Structure for High-Speed and Low-Power Bipolar LSI's", IEDM Technical Digest, 1983, pp. 55-58.
T. Nakamura et al., "Self-Aligned Transistor with Sidewall Base Electrode", ISSCC Technical Digest, 1981, pp. 214-215, 274.
Hearn Brian E.
Nguyen Tuan
OKI Electric Industry Co., Ltd.
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