Method of making flash EEPROM cell having first and second float

Details Method of making flash EEPROM cell having first and second float Method of making flash EEPROM cell having first and second float

1996-03-22

1997-10-07

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 44, 437 50, H01L 218247

Patent

active

056747683

ABSTRACT:
This invention relates to a Flash EEPROM (Electrically erasable programmable Read-Only Memory) cell and manufacturing methods thereof, especially which is capable of three different output levels by the variation of effective channel length depending on whether either or all of two floating gates are programmed or erased and the combination of bias, in which two floating gates are formed on a channel region.

REFERENCES:
patent: 4988635 (1991-01-01), Ajika et al.
patent: 5045491 (1991-09-01), Gill et al.
patent: 5378643 (1995-01-01), Ajika et al.
patent: 5429969 (1995-07-01), Chang

Affiliated with

Also associated with

Rating

Method of making flash EEPROM cell having first and second float does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of making flash EEPROM cell having first and second float, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of making flash EEPROM cell having first and second float will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2356753