Semiconductor fet with long channel length

Details Semiconductor fet with long channel length Semiconductor fet with long channel length

1989-09-01

1990-05-08

Mintel, William

357 2311, 357 2313, 357 51, H01L 2978

Patent

active

049242806

ABSTRACT:
In a semiconductor device having an external input terminal, a first insulated-gate field-effect transistor formed on a semiconductor substrate, and having a gate connected to the input terminal, and a second insulated-gate field effect transistor having a drain connected to the gate of the first insulated-gate field-effect transistor, and having a gate and source connected to a reference voltage source, the ratio W/L of the channel width W to the channel length L of the second insulated-gate field effect transistor is not less than 12.

REFERENCES:
patent: 3673427 (1972-06-01), McCoy et al.
patent: 4743566 (1988-05-01), Bastiaens et al.
Fukuda et al, "ESD Protection Network Evaluation by HMB and CDM(Charged Package Method)," 1986 EOS/ESD Symposium Proceedings, pp. 193-199, Sep. 23, 1986.
1984 IEEE/IRPS, "Snapback Induced Gate Dielectric Breakdown in Graded Junction MOS Structures," pp. 165-168, Shabde et al., 1984.

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