Fishing – trapping – and vermin destroying
Patent
1993-08-19
1996-01-02
Fourson, George
Fishing, trapping, and vermin destroying
437193, 437195, H01L 21328
Patent
active
054808154
ABSTRACT:
A process of fabricating a bipolar transistor, particularly forming a very shallow, uniform emitter diffused-layer for the purpose of realizing a higher speed of the device without need of prolongating LSI fabrication term. In the process of building a bipolar transistor on a n-type semiconductor substrate, after forming the p-type base region of the bipolar transistor, an insulating film is formed, in an region of which where an emitter is to be formed a contact hole is opened. In the next processing step, polysilicon films of different arsenic contents are stacked on top of one the other, followed by thermal diffusion of arsenic, to form an emitter region in the base region. The first polysilicon film has a low arsenic content than the second polysilicon film, and a silicon dioxide film of up to 5 nm in thickness is interposed between the polysilicon films.
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patent: 5272357 (1993-12-01), Morishita
patent: 5302535 (1994-04-01), Imaia et al.
"BSA Technology for Sub-100nm Deep Base Bipolar Transistors", IEEE, 1987, by H. Takemura et al., pp. 375-378.
Silicon Processing for the VLSI Era, Stanley Wolf 91 (1990).
Dutton Brian K.
Fourson George
NEC Corporation
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