Direct digital synthesis measurement signal skew tester

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Details

364579, 364580, 364721, 364488, 371 1, 371 24, 324 7682, 324 7683, G04F 1520

Patent

active

052315983

ABSTRACT:
A skew tester (60) measures output timing skew parameters OSHL and OSLH between multiple output signals of an integrated circuit (IC) device under test (DUT) having an input and multiple outputs. A measurement signal generating circuit (15,16,18,20) generates a square wave measurement signal at a test signal frequency synchronized with a clock signal. The measurement signal generating circuit uses direct digital synthesis to provide a specified phase shift resolution. A test signal generating circuit (15,22,24) generates a square wave test signal at the test signal frequency using the same clock signal. The test signal and measurement signal are therefore synchronized in frequency. The test signal is applied to the input of a DUT (25) and a switch (30) selects one of the DUT output signals. The selected output signal and the square wave measurement signal are applied to the inputs of a comparator (45) which generates an output according to the difference in phase between the selected output signal and measurement signal. A threshold detector circuit (50) delivers a count signal in response to an output from the comparator (45) related to a threshold level. A programmable controller (12) is programmed to shift the phase of the measurement signal toward the phase of the selected output signal in phase increments or steps equal to the specified phase shift resolution during occurrence of count signals. The microcontroller counts phase shift increments to a maximum count (MAXCOUNT) at which the phase of corresponding edges substantially coincide and generates a skew number for comparison with skew numbers from the other multiple outputs and for calculating skew parameters OSHL and OSLH.

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