Phase-locked clock

Details Phase-locked clock Phase-locked clock

1984-08-31

1986-02-04

Bookbinder, Marc E.

Pulse or digital communications

Spread spectrum

Direct sequence

307269, 307511, 328 72, 328155, 331 1A, H04L 700

Patent

active

045690650

ABSTRACT:
A phase-locked clock incorporating a combined phase comparator and control device (20) that controls a multiplexer (22). Multiplexer (22) receives as inputs the outputs from circuits called decoders which add a predetermined digital value to, or subtract said value from, the value applied to the inputs thereof, which latter value is received from a buffer register (30) disposed at the output of the multiplexer. The contents of the buffer register are transferred under the control of a local oscillator (10). The output from the buffer register is fed to a fixed frequency divider (13) through a carry logic circuit (32).

REFERENCES:
patent: 3646452 (1972-02-01), Horowitz et al.

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