Logic full adder circuit

Details Logic full adder circuit Logic full adder circuit

1985-02-04

1988-03-08

Harkcom, Gary V.

Boots, shoes, and leggings

364784, 364786, 357 41, G05F 750, H01L 2702

Patent

active

047302666

ABSTRACT:
A logic circuit incorporating carry look-ahead in which efficiency can be achieved regarding the hardware for generating the sum signals and carry signals by a suitable choice of the adder gate, making use of the already present signal a.sub.1 .multidot.b.sub.i which is used for generating the carry look-ahead signal.

REFERENCES:
patent: 3932734 (1976-01-01), Parsons
patent: 4052604 (1977-10-01), Maitland et al.
patent: 4384287 (1983-05-01), Sakuma
patent: 4417314 (1983-11-01), Best
patent: 4425623 (1984-01-01), Russell
patent: 4441158 (1984-04-01), Kanuma
patent: 4464729 (1984-08-01), Mlynek
patent: 4504924 (1985-03-01), Cook et al.
patent: 4564921 (1986-01-01), Suganuma

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