Microcomputer system providing time management enabling control

Details Microcomputer system providing time management enabling control Microcomputer system providing time management enabling control

1989-03-21

1996-08-20

Ellis, Richard L.

Boots, shoes, and leggings

364569, G06F 300

Patent

active

055487742

ABSTRACT:
Microcomputer system providing time management enabling control and acquisition of data indicative of condition changes occurring at high speed. The system comprises a memory plane with associated address decoders and interface circuits which define a switched register zone operably coupled to a memory control logic and a processor via the interface circuits and temporally shiftable therebetween. An address generator is connected to the switched register zone and provides respective addresses thereto in response to an access by the memory control logic. A time base circuit is connected to the switched register zone and to a sequencer which is likewise connected to the switched register zone. An action unit controlled by the time base circuit decodes control commands from the switched register zone. An input unit upon detecting a change of condition (e.g. in an operating engine) generates a capture request signal to the address generator. An output unit controlled by the time base circuit and connected to the action unit produces outputs with time delays, thereby desequencing the outputs. The switched register zone and the time base circuit interact with the input unit to provide an acquisition function and with the output unit to provide a control function. A serial interface driven by the time base circuit provides data reception and transmission functions, and an interrupt unit accepts interrupt requests originating from the programmable control function, the programmable acquisition function or from the serial interface and places the interrupt requests in a dynamic priority hierarchy.

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