Excavating
Patent
1995-08-24
1998-01-06
Beausoliel, Jr., Robert W.
Excavating
371 2231, 371 2232, 39518306, G01R 3128
Patent
active
057062978
ABSTRACT:
A digital system which normally initializes and tests non-JTAG logic units is adapted to test JTAG protocol compatible logic units. A JTAG translator unit provides an instruction control register and a Data Register. The Control Register has control bits for selecting Test-Mode-Select and Test Clock signals for the JTAG compatible units and Shift/Hold signals for the non-JTAG compatible logic units. The Data Register supplies diagnostic test bits to registers in both the JTAG and non-JTAG logic units. Additionally, the Control Register can initiate automatic incrementation of addresses to a control state RAM for rapid loading of microcode.
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Jeppesen, III James Henry
Whittaker Bruce Ernest
Beausoliel, Jr. Robert W.
Iqbal Nadeem
Kozak Alfred W.
Petersen Steven R.
Starr Mark T.
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