Field programmable logic device with dynamic interconnections to

Boots – shoes – and leggings

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

364489, 364DIG1, 364DIG2, G06F 1900

Patent

active

055967434

ABSTRACT:
The architecture, operation and design of a novel Field Programmable Logic Device is described. The device implements a circuit by using a dynamic logic core that executes staged logic corresponding to the logic levels of the implemented circuit. Logic inputs to the dynamic logic core are obtained from a dynamic interconnection array. Appropriate logic inputs for a given logic level are dynamically selected and routed by the dynamic interconnection array. When necessary, the dynamic interconnection array buffers signals which are required at subsequent logic levels. The dynamic interconnection array selects logic inputs for a given logic level from circuit input signals, buffered signals and dynamic logic core output signals.

REFERENCES:
patent: 3987286 (1976-10-01), Muehldorf
patent: 4422072 (1983-12-01), Cavlan
patent: 4642487 (1987-02-01), Carter
patent: 4703206 (1987-10-01), Cavlan
patent: 4706216 (1987-11-01), Carter
patent: 4758985 (1988-07-01), Carter
patent: 4855619 (1989-08-01), Hsieh et al.
patent: 4870302 (1989-09-01), Freeman
patent: 4930097 (1990-05-01), Ledenbach et al.
patent: 4992680 (1991-02-01), Benedetti et al.
patent: 5015885 (1991-05-01), El Gamal et al.
patent: 5027315 (1991-06-01), Agrawal et al.
patent: 5036473 (1991-07-01), Butts et al.
patent: 5075576 (1991-12-01), Cavlan
patent: 5105388 (1992-04-01), Itano et al.
patent: 5140193 (1992-08-01), Freeman et al.
patent: 5185706 (1993-02-01), Agrawal et al.
patent: 5317209 (1994-05-01), Garverick et al.
patent: 5329460 (1994-07-01), Agrawal et al.
Dynamic Techniques for Yield Enhancement of field Programmable Logic Array, by Demjanenko et al, IEEE 1988, pp. 485-491.
Reduced Overhead by partitioning of a Circular-shift PLAs by Han et al, IEEE 1990 publication. pp. 1057-1060.
Brown, et al., Field Programmable Gate Arrays, Kluwer Academic Publishers, 1992, pp. 20-41.
Francis, Robert J., A Tutorial on Logic Synthesis for Lookup-Table Based FPGAs, Pro. Int. Conf. CAD (ICCAD-92), pp. 40-47, Nov. 1992.
Kuh, et al., "Recent Advances in VLSI Layout", Proc. IEEE, vol. 78, No. 2, pp. 237-263, Feb. 1990.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Field programmable logic device with dynamic interconnections to does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Field programmable logic device with dynamic interconnections to, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Field programmable logic device with dynamic interconnections to will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2332188

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.