Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1993-10-15
1996-08-20
Fahmy, Wael M.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257510, 257521, H01L 2900
Patent
active
055481540
ABSTRACT:
A method is provided for forming isoplanar isolated regions in an integrated circuit, and an integrated circuit formed according to the same. According to a first disclosed embodiment, a first epitaxial layer is formed over a substrate, the substrate having a (100) crystal orientation. A first masking layer is formed over the first epitaxial layer. The first masking layer is patterned and the first epitaxial layer is etched to form openings. The sidewalls of these openings have a (111) crystal orientation. The first masking layer is then removed and a second masking layer is formed in the openings. The first epitaxial layer is anodized and oxidized. The second masking layer is removed and a second epitaxial layer is formed in the openings. According to an alternate embodiment, after the first epitaxial layer is anodized, the second epitaxial layer is formed in the openings and the first epitaxial layer is then oxidized.
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Fahmy Wael M.
Hill Kenneth C.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
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