Amplifiers – With semiconductor amplifying device – Including field effect transistor
Patent
1991-10-07
1993-04-27
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including field effect transistor
330286, 330297, H03F 360
Patent
active
052066088
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a drain bias circuit for high power microwave field effect transistors (FETs), having internal matching.
DESCRIPTION OF THE RELATED ART
Solid state power amplifiers have been significantly improved in recent years and it is expected that more and more of these devices will be used in the future on board satellites. The major advantages of such amplifiers for space applications are due to their high reliability, low mass and small dimensions, high degree of linearity, and improved system flexibility. In this context, high power microwave field effect transistors (FETs) with internal matching have recently appeared on the market as devices which are very compact, very reliable, and which are capable of handling sufficient radiofrequency (RF) power to be suitable for use on board space vehicles.
It should be recalled that when designing a microwave amplifier including an FET device, the drain bias circuit must satisfy the following two fundamental requirements:
1) the FET must be controlled using the appropriate voltage and current corresponding to the selected operating mode; and
2) the effect of the bias circuit on the RF behavior of the circuit must be minimized.
When applied to a power FET having internal matching, these two fundamental conditions can be specified in greater detail, as follows:
1*) the drain bias circuit must process very high currents, which may be of the order of 5 A to 6 A; and
2*) the matching circuit from which the FET is powered is designed in such a manner that optimum behavior of the device is achieved when it includes a load of 50.OMEGA.: under such circumstances, that means there is no need for an external matching circuit and the bias circuit must be connected to the RF circuit in such a manner as to give rise to minimal disturbance.
In the context of space vehicle applications, it is clear that reliability is a very important parameter to be taken into consideration when implementing the bias circuit.
FIGS. 1A-1C shows three different approaches that are normally followed when implementing a drain bias circuit (cf. Avantek, Notes on choke network design, AN-A001, June 1986, and Fujitsu Microwave Semiconductors' 88 Application Notes).
FIGS. 1A and 1B are circuits as typically used in low power amplifiers. Drain current is conveyed to the FET 10a or 10b via a respective cable 1a or 1b corresponding to a high impedance .lambda.g/4 transmission line which constitutes a very high impedance at the operating frequency for the 50.OMEGA. transmission line 3a or 3b. In order to avoid too high a current density along the high impedance transmission line, the drain current is limited to a few hundred mA, thus limiting the power that can be handled by this type of bias circuit.
To fill out the above brief description of the circuits FIGS. 1A and 1B, it should be specified that 2a or 2'b and 2b" represent DC power supply blocks, 4 represents a low impedance transmission line, and 5a or 5b represents a 50.OMEGA. load (G, D, and S being the conventional symbols for the electrodes of an FET, namely the gate, the drain, and the source, respectively). The devices 7a or 7b are for biasing purposes together with the high impedance lines 1a or 1b.
To overcome the problem caused by the high impedance line, the circuit of FIG. 1C uses an RF choke coil 8. However, the 50.OMEGA. transmission line cannot handle very high control currents and as a result the coil must be connected to the transmission line in such a manner as to be disposed close to the FET. In addition, the size of the link area is comparable to the width of the transmission line, thereby making the reliability of the link very low and making its RF behavior unpredictable.
The other components in the circuit of FIG. 1C correspond to the components in circuits of FIGS. 1A and 1B and they are distinguished therefrom by applying the prefix c to the corresponding numerical references.
SUMMARY OF THE INVENTION
An object of the present invention is thus to design a new drain bias c
REFERENCES:
patent: 4277764 (1981-07-01), Rosier et al.
patent: 4591803 (1986-05-01), Saleh
Patent Abstracts of Japan, vol. 10, No: 16, (E-375)(2073), Jan. 22, 1986, & JP. A. 60178710 9Nippon Denshin Denwa Kosha), Sep. 12, 1985.
Patent Abstracts of Japan, vol. 2, No: 90 (E-78)(4133), Jul. 22, 1978, & JP, A, 5354454 (Fujitsu), May 17, 1978.
Electronic Components & Application, vol. No: 1, Oct. 1978, "UHF broadband amplifier for transposer vol. IV and V", pp. 43-44, see p. 44; FIG. 2.
Agence Spatiale Europeenne
Mullins James B.
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