method for fabricating an embedded vertical bipolar transistor a

Details method for fabricating an embedded vertical bipolar transistor a method for fabricating an embedded vertical bipolar transistor a

1995-12-27

1996-08-20

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437 31, 437 56, 437 60, 437919, H01L 2170, H01L 2700

Patent

active

055478930

ABSTRACT:
The present invention provides a method of simultaneously forming CMOS DRAM cells, CMOS devices, and vertical bipolar transistors on the same chip. The invention utilities a CMOS DRAM process to simultaneously fabricate a vertical bipolar transistor and uses only one additional mask (a base implant mask) compared to forming the DRAM cell alone. Also, to reduce the bipolar collector plug resistance, the process uses a tungsten-plug module where the collector is formed within a field oxide region near the base.

REFERENCES:
patent: 5238860 (1993-08-01), Sawada et al.
patent: 5336632 (1994-08-01), Imamura
patent: 5389566 (1995-02-01), Lage
patent: 5401681 (1995-03-01), Dennison
patent: 5422295 (1995-06-01), Choi et al.
patent: 5496758 (1996-03-01), Ema

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