Method for manufacturing a SRAM cell having asymmetrical LDD typ

Details Method for manufacturing a SRAM cell having asymmetrical LDD typ Method for manufacturing a SRAM cell having asymmetrical LDD typ

1994-12-22

1996-08-20

Tsai, H. Jey

Fishing, trapping, and vermin destroying

437 47, 437 48, 437 40, H01L 2170, H01L 2700

Patent

active

055478883

ABSTRACT:
In a method for manufacturing an asymmetrical LDD type MOS transistor, low concentration impurity diffusion regions are formed within a semiconductor substrate on both sides of a gate electrode. Then, sidewall insulating layers are formed on both sides of the gate electrode, and, after that, high concentration inpurity diffusion regions are formed within the semiconductor substrate on both sides of the sidewall insulating layers. Then, one of the sidewall insulating layers is removed simulataneously with formation of contact holes in an interlayer formed on on the entire surface. Finally, impurities are implanted with a mask of the interlayer, to enlarge one of the high concentration impurity diffusion regions.

REFERENCES:
patent: 4554729 (1985-11-01), Tanimura et al.
patent: 5034797 (1991-07-01), Yamanaka et al.
patent: 5179033 (1993-01-01), Adam

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